_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x1000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000;

/* Define all the memory regions in the system */
MEMORY
{
plb_bram_if_cntlr_1 : ORIGIN = 0xffff0000, LENGTH = 0xffff - 4
boot : ORIGIN = 0xfffffffc, LENGTH = 4
}

PHDRS
{
/*
  ivector PT_LOAD ;
*/
  program PT_LOAD ;
  data1 PT_LOAD ;
  data2 PT_LOAD ;
  stack PT_LOAD ;
  heap PT_LOAD ;
  boot0 PT_LOAD ;
  boot PT_LOAD ;
}

/*
* Specify the default entry point to the program
*/
ENTRY(_boot)
STARTUP(boot.o)
/* GROUP(libxil.a libc.a) */

/*
* Define the sections, and where they are mapped in memory
*/
SECTIONS
{

  /* 
   * This section is only needed if you have 
   * interrupts or exceptions
   * Ensure that this is on a 64K boundary 
   */
/*
  .vectors :
  {
    *(.vectors)
  } >  : ivector
*/

  .text      :
  {
    *(.text)
  } > plb_bram_if_cntlr_1 : program
  _etext = .;
  PROVIDE (etext = .);
  PROVIDE (__etext = .);

  .rodata    :
  {
    *(.rodata)
  } > plb_bram_if_cntlr_1 : data1

  .sdata2   : { *(.sdata2) } > plb_bram_if_cntlr_1 
  __SDATA2_START__ = ADDR(.sdata2);
  __SDATA2_END__ = ADDR(.sdata2) + SIZEOF(.sdata2);

  .sbss2   : { *(.sbss2) } > plb_bram_if_cntlr_1 
  __SBSS2_START__ = ADDR(.sbss2);
  __SBSS2_END__ = ADDR(.sbss2) + SIZEOF(.sbss2);

  .data    :
  {
    *(.data)
  } > plb_bram_if_cntlr_1 : data2

  .fixup	: { *(.fixup) } > plb_bram_if_cntlr_1 
  .got1		: { *(.got1) } > plb_bram_if_cntlr_1 
  .got2		: { *(.got2) } > plb_bram_if_cntlr_1 

 
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata	  : { *(.sdata) } > plb_bram_if_cntlr_1
  __SDATA_START__ = ADDR(.sdata);
  __SDATA_END__ = ADDR(.sdata) + SIZEOF(.sdata);
  _edata  =  .;
  PROVIDE (edata = .);
  PROVIDE (__edata = .);

  .sbss      :
  {
    __sbss_start = .;
    ___sbss_start = .;
    *(.sbss)
    *(.scommon)
    __sbss_end = .;
    ___sbss_end = .;
  } > plb_bram_if_cntlr_1

  .bss       :
  {
   __bss_start = .;
   ___bss_start = .;
   *(.bss)
   *(COMMON)
   . = ALIGN(4);
   __bss_end = .;
  } > plb_bram_if_cntlr_1

  .bss_stack    :
  {
    /* add stack and align to 16 byte boundary */
    . = . + _STACK_SIZE;
    . = ALIGN(16);
    __stack = .;
  } > plb_bram_if_cntlr_1 : stack

  .bss_heap    :
  {
    /* add heap and align to 16 byte boundary */
     . = ALIGN(16);
    _heap_start = .;
    . = . + _HEAP_SIZE;
    . = ALIGN(16);
    _heap_end = .;
  } > plb_bram_if_cntlr_1 : heap

  /* BOOT0 must be a memory whose address is within 24 bits of .boot */
  /* Normally it is the same physical memory as .boot */
  .boot0  : { *(.boot0)} > plb_bram_if_cntlr_1 : boot0
  _end = . ;
  end = .;
  __end = .;

  /* There needs to be some memory defined at this address */
  .boot  0xFFFFFFFC  : { *(.boot) } : boot

}